Advanced Micro Devices Post Silicon Validation Engineer Interview Questions and Answers

Q1. Toggle the bits of given input
Ans. 
Toggle the bits of given input
• Create a mask with all bits set to 1

• XOR the input with the mask to toggle the bits

• Repeat the process for each bit position
Answered by AI
Add your answer
Q2. Clear the set bit
Add your answer

Q1. Print the star pattern
Ans. 
Print a star pattern using loops
• Use nested loops to print the desired pattern

• Increment the number of stars in each row to create the pattern

• Example: for a pattern with 5 rows - * , ** , *** , **** , *****
Answered by AI
Add your answer
Q2. Microprocessor microcontroller topics are asked
Add your answer

Basic aptitude-10 question,digital moderate -Question,analog moderate -10 question,verilog and system verilog -10 question

Q1. Latches and flip flop all characteristics equation and proof of the characteristics equation in flip flop.applications of flip flop
Add your answer
Q2. OOPS,INHERITANCE,VERILOG,BLOCKING - NON BLOCKING ASSIGNMENT OPERATOR and all the basic operations of verilog .
Add your answer
Q3. Discussion on work experience.
Add your answer

Q1. What is cross talk
Ans. 
Cross talk is the unwanted transfer of signals between different components or traces on a circuit board.
• Occurs when signals from one trace interfere with signals on another trace

• Can lead to signal distortion or errors in data transmission

• Prevented by proper spacing and shielding between traces

• Example: Cross talk between data lines on a PCB causing errors in communication
Answered by AI
Add your answer
Q2. How to define generated clocks through edges
Ans. 
Generated clocks through edges are defined by specifying the source clock and the edge on which the generated clock is based.
• Specify the source clock for the generated clock

• Define the edge (rising/falling) on which the generated clock is based

• Use tools like Synopsys Design Compiler to define generated clocks
Answered by AI
Add your answer

Q1. Basics of analog , digital and vlsi
Add your answer
Q2. On face to face interview, they asked me abt my projects , digital, little analog , vlsi ( verilog), microcontrollers and c programming
Add your answer

40 aptitude qns and some mcqs on basic programming

Q1. I was asked to write two sum, palindrome function and merge sort code in whatever language I'm comfortable in
Add your answer
Q2. Two sum- return true or false
Ans. 
Given an array of integers, determine if there are two numbers that add up to a specific target.
• Iterate through the array and store each element in a hash set.

• For each element, check if the difference between the target and the element exists in the hash set.

• If the difference exists, return true; otherwise, continue iterating.

• Example: nums = [2, 7, 11, 15], target = 9. The function should return true as 2 + 7 = 9.
Answered by AI
View 1 more answer
Q3. Merge sort function code
Add your answer
Q4. Palindromic string or not
Add your answer

Q1. Asked the working experience and the related skills to the new job
Add your answer

Q1. Coding questions in Verilog, Systemverilog, random constraints such as how to write a onehot in different ways
Add your answer

Q1. Asked the expectation of the base salary and overall compensation
Add your answer

Q1. Python programming
Add your answer
Q2. Btech final project
Ans. 
Designed a smart irrigation system using IoT technology for Btech final project.
• Implemented sensors to measure soil moisture levels

• Utilized microcontrollers to control water flow based on sensor data

• Developed a mobile app for remote monitoring and control
Answered by AI
Add your answer