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VLSI FIRST

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3.5

based on 4 Reviews

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VLSI FIRST RTL Design and Verification Engineer salaries in Hyderabad / Secunderabad

Annual salary range
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₹0.9 Lakh - ₹1.2 Lakh
Low Confidence
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Last Updated: 28 Dec 2024

Companies similar to VLSI FIRST for RTL Design and Verification Engineer in Hyderabad / Secunderabad

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VLSI FIRST RTL Design and Verification Engineer Salary

Fresher (AmbitionBox Estimate)

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₹0.9 L/yr - ₹1.2 L/yr

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₹3 L/yr - ₹5 L/yr

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RTL Design and Verification Engineer salary at VLSI FIRST ranges between ₹0.9 Lakh to ₹1.2 Lakh per year for employees with less than 1 year of experience. Salary estimates are based on 1 latest salaries received from various employees of VLSI FIRST.

Salary related reviews for VLSI FIRST

2.7

Rated by 2 employees for salary & benefits

RTL Design And Verification Engineer in Hyderabad / Secunderabad

Full Time

 · 

Engineering - Hardware & Networks Department

4.0
  •  posted on 03 Jul 2023
4.0
 for  Salary and Benefits

Likes

I'm a trained Student at VLSI FIRST Institute in Hyderabad, This is completely front end developer- Hardware on RTL Design and Verification Engineer, the study of learning was very intresting and field was good and the projects are also good & the faculties are very good and a kind of friendly nature, You fully clarify the doughts finally this is good to work place and for the students also.

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  • Salary - Good
    • +6 more

Dislikes

Nil!

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I was getting 15.2 LPA in my previous org and now i am being offered 29.5 LPA but the designation is 1 position lower than what i was in my previous org. Should i go ahead with the offer or still negotiate on designation. Protip : i was laid off in my previous org.
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VLSI FIRST RTL Design and Verification Engineer salary in Hyderabad / Secunderabad ranges between ₹0.9 Lakh to ₹1.2 Lakh. This is an estimate based on latest salaries received from employees of VLSI FIRST.