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VLSI FIRST Design & Verification Engineer salaries in India

Annual salary range
0 - 1 year exp.
₹4.5 Lakhs - ₹6 Lakhs
Low Confidence
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Low confidence means that this average salary is based on data that was reported by very few people.
Salary of majority employees
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35% less than the average Design & Verification Engineer Salary for 0 - 1 year of experience

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Last Updated: 30 Aug 2024

Companies similar to VLSI FIRST for Design & Verification Engineer

Company name Avg Annual Salary Open Jobs
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Wipro Design & Verification Engineer Salary

1 - 4 years exp. (84 salaries)

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₹3.5 L/yr - ₹10 L/yr

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₹4 L/yr - ₹8 L/yr

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1 job opening
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₹3.5 L/yr - ₹10 L/yr

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HCLTech Design & Verification Engineer Salary

1 - 3 years exp. (21 salaries)

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₹4.5 L/yr - ₹6.5 L/yr

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TCS Design & Verification Engineer Salary

2 - 4 years exp. (12 salaries)

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₹4 L/yr - ₹8.1 L/yr

arrow icon 8% more
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₹5.8 L/yr - ₹6 L/yr

arrow icon 18% more
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₹5 L/yr - ₹5.5 L/yr

arrow icon 5% more
Design & Verification Engineer salary at VLSI FIRST ranges between ₹4.5 Lakhs to ₹6 Lakhs per year for employees with less than 1 year of experience. Salary estimates are based on 3 latest salaries received from various employees of VLSI FIRST.

Latest annual salaries shared by VLSI FIRST Design & Verification Engineer

8mo ago
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1 year exp.

Experience wise VLSI FIRST Design & Verification Engineer salaries

Last Updated: 30 Aug 2024

Experience Avg Annual Salary
Fresher (AmbitionBox Estimate)

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₹4.7 L/yr - ₹6 L/yr
1 year (AmbitionBox Estimate)

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₹4.1 L/yr - ₹5.2 L/yr

Similar Designation salaries in VLSI FIRST

RTL Design Engineer Salary
(AmbitionBox Estimate)
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₹3.2 L/yr - ₹4.1 L/yr

Salary related reviews for VLSI FIRST

Full Time

 · 

Engineering - Hardware & Networks Department

4.0
  •  posted on 03 Jul 2023

4.0
 for  Salary and Benefits

Likes

I'm a trained Student at VLSI FIRST Institute in Hyderabad, This is completely front end developer- Hardware on RTL Design and Verification Engineer, the study of learning was very intresting and field was good and the projects are also good & the faculties are very good and a kind of friendly nature, You fully clarify the doughts finally this is good to work place and for the students also.

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  • Salary - Good
    +6 more

Dislikes

Nil!

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VLSI FIRST Design & Verification Engineer Salary FAQs

What is the notice period for Design & Verification Engineer at VLSI FIRST?
According to AmbitionBox, 50% of the VLSI FIRST Design & Verification Engineers reported a notice period of 15 days or less, 50% reported a notice period of 3 Months.This is based on 2 responses on AmbitionBox in last 2 years.

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VLSI FIRST Design & Verification Engineer salary in India ranges between ₹4.5 Lakhs to ₹6 Lakhs with an average annual salary of ₹unlock blur. Salary estimates are based on 3 VLSI FIRST latest salaries received from various employees of VLSI FIRST.