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Verilog Networks Junior Design Engineer salaries in India

Annual salary range
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₹3.4 Lakhs - ₹4.4 Lakhs
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Last Updated: 27 Mar 2021

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Junior Design Engineer salary at Verilog Networks ranges between ₹3.4 Lakhs to ₹4.4 Lakhs per year for employees with 3 years of experience. Salary estimates are based on 1 latest salaries received from various employees of Verilog Networks.

Similar Designation salaries in Verilog Networks

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(AmbitionBox Estimate)
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₹17.1 L/yr - ₹21.8 L/yr

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Verilog Networks Junior Design Engineer salary in India ranges between ₹3.4 Lakhs to ₹4.4 Lakhs. This is an estimate based on latest salaries received from employees of Verilog Networks.