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Synergic Emergence

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5.0

based on 1 Review

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This rating is based on a small number of reviews, so it may not fully reflect the overall employee experience.
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Synergic Emergence Design & Verification Engineer salaries in India

Annual salary range
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₹10.8 Lakhs - ₹13.8 Lakhs
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Last Updated: 9 Aug 2022

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Design & Verification Engineer salary at Synergic Emergence ranges between ₹10.8 Lakhs to ₹13.8 Lakhs per year for employees with 2 years of experience. Salary estimates are based on 1 latest salaries received from various employees of Synergic Emergence.

Top skills at Synergic Emergence for Design & Verification Engineer

System Verilog UVM Design Verification Verilog Scripting SOC Verification TCL FPGA VCS VHDL Embedded C VLSI OVM Python Embedded

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2w (edited)
an associate vice president
Offer Accepted
I was getting 15.2 LPA in my previous org and now i am being offered 29.5 LPA but the designation is 1 position lower than what i was in my previous org. Should i go ahead with the offer or still negotiate on designation. Protip : i was laid off in my previous org.
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Synergic Emergence Design & Verification Engineer salary in India ranges between ₹10.8 Lakhs to ₹13.8 Lakhs. This is an estimate based on latest salaries received from employees of Synergic Emergence.