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SkandySys Technologies Asic Design Verification Engineer salaries in India

Annual salary range
2 - 3 years exp.
₹3.6 Lakhs - ₹4.6 Lakhs
Low Confidence
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Low confidence means that this average salary is based on data that was reported by very few people.
Avg. annual salary (AmbitionBox Estimate)
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Monthly In-hand Salary

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Last Updated: 11 Mar 2023

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Asic Design Verification Engineer salary at SkandySys Technologies ranges between ₹3.6 Lakhs to ₹4.6 Lakhs per year for employees with experience between 2 years to 3 years. Salary estimates are based on 2 latest salaries received from various employees of SkandySys Technologies.

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SkandySys Technologies Asic Design Verification Engineer Salary FAQs

How the salary growth look like for a Asic Design Verification Engineer at SkandySys Technologies in India?
The salary growth for a Asic Design Verification Engineer at SkandySys Technologies depends on factors such as experience, performance, and promotions. On average, a Asic Design Verification Engineer can expect the following growth trajectory at SkandySys Technologies:

Experience Average Salary Range
2 years ₹4.5 Lakhs to ₹5.8 Lakhs per year
3 years ₹2.7 Lakhs to ₹3.5 Lakhs per year
and so on.

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SkandySys Technologies Asic Design Verification Engineer salary in India ranges between ₹3.6 Lakhs to ₹4.6 Lakhs. This is an estimate based on latest salaries received from employees of SkandySys Technologies.