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Quezapp Technologies Asic Design Verification Engineer salaries in Hyderabad / Secunderabad

Annual salary range
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₹2.7 Lakhs - ₹3.5 Lakhs
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Low confidence means that this average salary is based on data that was reported by very few people.
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Last Updated: 13 Mar 2023

Companies similar to Quezapp Technologies for Asic Design Verification Engineer in Hyderabad / Secunderabad

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Quezapp Technologies Asic Design Verification Engineer Salary

3 years exp. (AmbitionBox Estimate)

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₹2.7 L/yr - ₹3.5 L/yr

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Asic Design Verification Engineer salary at Quezapp Technologies ranges between ₹2.7 Lakhs to ₹3.5 Lakhs per year for employees with 3 years of experience. Salary estimates are based on 1 latest salaries received from various employees of Quezapp Technologies.

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₹2 L/yr - ₹3 L/yr

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Quezapp Technologies Asic Design Verification Engineer salary in Hyderabad / Secunderabad ranges between ₹2.7 Lakhs to ₹3.5 Lakhs. This is an estimate based on latest salaries received from employees of Quezapp Technologies.