Upload Button Icon Add office photos
filter salariesFilter salaries by

MasterVLSI Design Verification Trainee salaries in India

Annual salary range
Select experience
₹0.9 Lakh - ₹1.2 Lakh
Salary of majority employees
unlock blur
unlock blur

72% less than the average Design Verification Trainee Salary for Fresher

Interested in this particular role?

Last Updated: 24 Sep 2024

Companies similar to MasterVLSI for Design Verification Trainee

Company name Avg Annual Salary Open Jobs
unlock blur

₹3.6 L/yr - ₹4.2 L/yr

arrow icon 275% more
Logo
Wipro Design Verification Trainee Salary

1 - 4 years exp. (3 salaries)

unlock blur

₹2 L/yr - ₹6.5 L/yr

arrow icon 317% more
Logo
Capgemini Design Verification Trainee Salary

0 - 2 years exp. (3 salaries)

unlock blur

₹4.1 L/yr - ₹5.2 L/yr

arrow icon 350% more
unlock blur

₹3.6 L/yr - ₹4.1 L/yr

arrow icon 284% more
unlock blur

₹1 L/yr - ₹6.5 L/yr

arrow icon 396% more
Design Verification Trainee salary at MasterVLSI ranges between ₹0.9 Lakh to ₹1.2 Lakh per year for employees with less than 1 year of experience. Salary estimates are based on 5 latest salaries received from various employees of MasterVLSI.

Latest annual salaries shared by MasterVLSI Design Verification Trainee

2mo ago
avg blur mobile
5 months exp.
7mo ago
avg blur mobile
5 months exp.
1y ago
avg blur mobile
5 months exp.

Experience wise MasterVLSI Design Verification Trainee salaries

Last Updated: 24 Sep 2024

Experience Avg Annual Salary
Fresher  (5 salaries)

unlock blur

₹1 L/yr - ₹3 L/yr

MasterVLSI Design Verification Trainee Salary FAQs

What is the salary of Design Verification Trainee at MasterVLSI?
Design Verification Trainee salary at MasterVLSI in India ranges between ₹0.9 Lakhs to ₹1.2 Lakhs for less than 1 year of experience. According to our estimates it is 72% less than the average Design Verification Trainee Salary in India. Salary estimates are based on 5 latest salaries received from various employees of MasterVLSI India.
How does the salary of a Design Verification Trainee at MasterVLSI India compare with the average salary range for this job?
The average salary of a Design Verification Trainee at MasterVLSI is 72% less than the average salary of a Design Verification Trainee in India. To know exact salary insights, login to view.
Which similar companies are paying more than MasterVLSI to a Design Verification Trainee in India?
  • Maven Silicon Design Verification Trainee Salary - ₹1.0 Lakhs to ₹6.5 Lakhs per year
  • Capgemini Design Verification Trainee Salary - ₹4.1 Lakhs to ₹5.2 Lakhs per year
  • Wipro Design Verification Trainee Salary - ₹2.0 Lakhs to ₹6.5 Lakhs per year
  • Cerium Systems Design Verification Trainee Salary - ₹3.6 Lakhs to ₹4.1 Lakhs per year
  • Tech Mahindra Design Verification Trainee Salary - ₹3.6 Lakhs to ₹4.2 Lakhs per year
What is the estimated take home salary of a Design Verification Trainee at MasterVLSI in India?
The estimated take-home salary of a Design Verification Trainee at MasterVLSI ranges between ₹6,682 per month to ₹7,313 per month in India. The take-home salary calculation is based on the average MasterVLSI Design Verification Trainee salary in India which ranges between ₹0.9 Lakhs to ₹1.2 Lakhs per year for employees with less than 1 year of experience. Check how did we calculate take home salary?
What is the notice period for Design Verification Trainee at MasterVLSI?
According to AmbitionBox, 100% of the MasterVLSI Design Verification Trainees reported a notice period of 15 days or less.This is based on 5 responses on AmbitionBox in last 2 years.

Tell us how to improve this page.

MasterVLSI Design Verification Trainee salary in India ranges between ₹0.9 Lakh to ₹1.2 Lakh with an average annual salary of ₹unlock blur. Salary estimates are based on 5 MasterVLSI latest salaries received from various employees of MasterVLSI.