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MasterVLSI

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5.0

based on 2 Reviews

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MasterVLSI Asic Verification Engineer salaries in India

Annual salary range
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₹4.9 Lakhs - ₹6.3 Lakhs
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Last Updated: 13 Mar 2023

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Asic Verification Engineer salary at MasterVLSI ranges between ₹4.9 Lakhs to ₹6.3 Lakhs per year for employees with 2 years of experience. Salary estimates are based on 1 latest salaries received from various employees of MasterVLSI.

Similar Designation salaries in MasterVLSI

Design & Verification Engineer Salary
(4 salaries)
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₹1 L/yr - ₹4 L/yr
Verification Engineer Salary
(AmbitionBox Estimate)
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₹1.8 L/yr - ₹2.3 L/yr

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2w
a technical project manager
Deadend
Hi, I'm here to share a part of my journey from the past 12 years in my career, I started from a package of 3.6LPA in 2013 at iGate and due to a few bad decisions on my career and worthless advices from people who are always pessimistic about the industry, I switched two companies and landed in a start-up with 2.4LPA. I worked hard nearly 8-16hrs a day single handed researched, built and managed an entire vertical of a project for 8 years. When the company didn't value my contribution and thought I was too young to become a manager, I had a package of 6LPA and Senior developer in designation. I switched for obvious reasons to a TL role for 12LPA and now at the same company I'm a TPM on the basis of my contribution with 48LPA as a fixed component. I feel outclassed in terms of having a fancy CV with certifications, I feel like CTC has hit a peak with 48LPA being fixed and nearly 40% in Variable. Most companies are hesitant to hire me because of this. What should be my next move?
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MasterVLSI Asic Verification Engineer salary in India ranges between ₹4.9 Lakhs to ₹6.3 Lakhs. This is an estimate based on latest salaries received from employees of MasterVLSI.