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MasterVLSI

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5.0

based on 2 Reviews

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This rating is based on a small number of reviews, so it may not fully reflect the overall employee experience.
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MasterVLSI Asic Verification Engineer salaries in India

Annual salary range
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₹4.9 Lakhs - ₹6.3 Lakhs
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Last Updated: 13 Mar 2023

Companies similar to MasterVLSI for Asic Verification Engineer

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Asic Verification Engineer salary at MasterVLSI ranges between ₹4.9 Lakhs to ₹6.3 Lakhs per year for employees with 2 years of experience. Salary estimates are based on 1 latest salaries received from various employees of MasterVLSI.

Similar Designation salaries in MasterVLSI

Design & Verification Engineer Salary
(4 salaries)
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₹1 L/yr - ₹4 L/yr
Verification Engineer Salary
(AmbitionBox Estimate)
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₹1.8 L/yr - ₹2.3 L/yr

Top trending discussions

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Salary Discussions, Hike & Promotions
2w
an architect
Help me choose New Regime or Old Regime for my salary revision
Hi I am working as a full stack Architect (14 yeo) and Following is my CTC. Please help me calculate in hand salary and choose New or OLD regime. I have been doing Old regime till last year with a salary of 48 CTC. Now post revision it increased to 56L CTC effective March 1st. My PF alone will cover 80C Also have additional 50000 contribution in NPS My HRA is around 25K per month (300000) Health insurance for family 28000 Mom's medical expense 30000 (No personal (Have medical complications) or corporate insurance unfortunately) I have a home loan however its under construction, so not eligible yet for tax benefits
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MasterVLSI Asic Verification Engineer salary in India ranges between ₹4.9 Lakhs to ₹6.3 Lakhs. This is an estimate based on latest salaries received from employees of MasterVLSI.