Atria Logic Bangalore / Bengaluru Design & Verification Engineer Salaries by 3 Employees (Updated 2025)

2 - 3 years exp.

₹5 Lakhs - ₹8 Lakhs

Low Confidence

Salary of majority employees

22% less than the average Design & Verification Engineer Salary in Semiconductors Companies for 2 - 3 years of experience

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Last Updated: 27 Nov 2024

Companies similar to Atria Logic for Design & Verification Engineer in Bangalore / Bengaluru

Atria Logic Design & Verification Engineer Salary

2 - 3 years exp. (3 salaries)

₹5 L/yr - ₹8 L/yr

Company name	Avg Annual Salary	Open Jobs
NXP Semiconductors Design & Verification Engineer Salary 3 - 5 years exp. (9 salaries)	₹9.3 L/yr - ₹20 L/yr 135% more
Qualcomm Design & Verification Engineer Salary 1 - 5 years exp. (18 salaries)	₹14.7 L/yr - ₹30.2 L/yr 231% more
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Texas Instruments Design & Verification Engineer Salary 2 - 6 years exp. (4 salaries)	₹22 L/yr - ₹26.1 L/yr 288% more
Broadcom Design & Verification Engineer Salary 2 - 4 years exp. (4 salaries)	₹6.5 L/yr - ₹16 L/yr 73% more
Analog Devices Design & Verification Engineer Salary 0 - 4 years exp. (8 salaries)	₹12 L/yr - ₹25 L/yr 219% more	6 job openings
Mirafra Technologies Design & Verification Engineer Salary 1 - 4 years exp. (20 salaries)	₹4.5 L/yr - ₹17 L/yr 73% more	2 job openings
Advanced Micro Devices Design & Verification Engineer Salary 0 - 3 years exp. (6 salaries)	₹5 L/yr - ₹13.5 L/yr 101% more
Samsung Semiconductor Design & Verification Engineer Salary 1 - 3 years exp. (5 salaries)	₹6 L/yr - ₹12 L/yr 57% more

Design & Verification Engineer salary at Atria Logic ranges between ₹5 Lakhs to ₹8 Lakhs per year for employees with experience between 2 years to 3 years. Salary estimates are based on 3 latest salaries received from various employees of Atria Logic.

Experience wise Atria Logic Design & Verification Engineer salaries in Bangalore / Bengaluru

Last Updated: 27 Nov 2024

Experience	Avg Annual Salary
2 years (AmbitionBox Estimate)	₹5 L/yr - ₹7 L/yr
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3 years (AmbitionBox Estimate)	₹3 L/yr - ₹8 L/yr

Similar Designation salaries in Atria Logic

Verification Engineer Salary

(14 salaries)

₹2.6 L/yr - ₹9.1 L/yr

Top skills at Atria Logic for Design & Verification Engineer

System Verilog Debugging Perl FPGA VHDL Visual Basic Ethernet Test Cases System Verilog Ethernet Python Digital Design Perl FPGA Python

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Salary Negotiation in an interview

Hi, I have had a first round of interview with the company. And mentioned my salary expectations as 15- 20% from my previous LPA. But after that I feel like I have undervalued my expectations. Being in the field for 9 years with the required skill, considering the market and the prospect company is a well known builder, i should have asked more. Anyway a face to face interview is scheduled next week. How to ask them a higher salary from what I have mentioned earlier. And how much I can ask more. Please help. Thanks in advance.

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Atria Logic Design & Verification Engineer Salary FAQs

What is the notice period for Design & Verification Engineer at Atria Logic in Bangalore / Bengaluru?

According to AmbitionBox, 50% of the Atria Logic Design & Verification Engineers in Bangalore / Bengaluru reported a notice period of 15 days or less, 50% reported a notice period of 1 Month.This is based on 4 responses on AmbitionBox in last 2 years.

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Atria Logic Design & Verification Engineer Salaries in Bangalore / Bengaluru

Atria Logic Design & Verification Engineer salary in Bangalore / Bengaluru ranges between ₹5 Lakhs to ₹8 Lakhs with an average annual salary of ₹. Salary estimates are based on 3 Atria Logic latest salaries received from various employees of Atria Logic.