Analog Layout Engineer

Role & responsibilities :

• Experience in manual full-custom Analog layout of IC in CMOS/Bi-CMOS process.
• Experience with high frequency layout • Design verification and debugging such as DRC, ERC, ESDDRC, LVS, ANTENNA DRC, using verification tool such as PVS.
• Floor planning from sub-block to chip top level.
• Very good understanding of matching techniques
• Excellent work experience in Analog Layout design in advanced node processes
• Hands on experience in any or multiple critical blocks such as BGR, LDO, Charge pump, SERDES, PHY, HDMI, PLL, ADC, DAC, LDO, Current Mirrors, Comparator, Differential Amplifier etc.
• Excellent understanding of CMOS / Bi-CMOS / SOI / FinFET process
• Excellent understanding of Analog Layout concepts (e.g. Matching, Electro- migration, Latch-up, Coupling, Crosstalk, IR-drop, Active and Passive parasitic devices etc.
• Excellent problem-solving skills in Routing Congestion, Physical Verification in Custom Layout.