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Field Application Engineer
Siemens
posted 4d ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- Youll be responsible for Field Application Engineering (FAE) activities in the Physical Verification (PV) Domain of VLSI systems.
- Youll understand customer needs on PV, involve in their projects by using the right methodologies and Siemens EDA tools for successful project completion.
- Involve and drive:
- Tool evaluation/benchmark
- Technical product presentations
- Methodology/flow development and review
- Tool deployment and adoption
- Customer tool usage
- Drive competitive replacements
- Provide support to customers during critical Project implementation/Tapeout phases.
- You ll be working with the Technical Account manager and worldwide account teams for forming strategies and successfully driving our tools inside customer projects to enable business success for the organization.
- You ll build and foster relationships with customers and peers with a positive attitude to win business success.
- You are also required to work with RD to enhance and develop the tool by gathering specifications and validating the flows/prototype in the customer environment.
We don t need superheroes, just super minds
- You re a BE/B.Tech in Electronics Communications Engineering or Electrical Electronics Engineering. ME/M.Tech in VLSI or Microelectronics will be an added advantage.
- You ve 4-10 years of good experience in the Physical Verification area of VLSI domain and served in positions like Application Engineering / Physical Verification lead/assignments that include Physical sign-off of large ASICs.
- You ve in-depth knowledge of DRC/LVS/EMIR and sign-off experience of large Multi-million gate ASICs
- Strong Layout fundamentals and understanding of physical layout and related physical verification issues at nanometer technologies (180 - 3nm) understanding of Design Rules Manual and capability to collaborate with customers for rule writing and development.
- You are good at scripting and able to develop scripts in TCL/Perl to develop AE-ware for customers
- You ve a sound understanding of transistor fundamentals, layout, and physical effects, and associated issues.
- Understanding of Parasitic Extraction, 2D 3D filed solvers, dealing with accuracy-related issues, R, C, and L extraction.
- You have decent understanding of both digital RTL-GDS and analog flows
- You have a solid understanding of EDA tools like Calibre DRC/LVS, DFM, Hercules, PVS, Dracula, Diva, Calibre PERC, Calibre xrc, Star-RC, XACT-3D
- Understanding the yield, parameters impacting yield, and Design for manufacturing techniques like Yield enhancement, CMP, and LFD will be a strong plus
- You re proficient with PNR (Place Route) tools like Olympus, SOC encounter, ICC2, and layout design tool is desired.
- You ve phenomenal interpersonal skills and have the ability to work autonomously ability to functionally lead a team.
Employment Type: Full Time, Permanent
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Flexible timing
Monday to Friday
No travel
Day Shift
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