IO pad layout Engineer

Requirements:.

Good knowledge of GPIO blocks, Transmitters, receivers etc·.

Good knowledge of CMOS logic·.

Experience in working on IO Layout for Bulk CMOS and FINFET nodes·.

Expertise on using industry standard tools like cadence Virtuoso, Calibre·.

Experience in implementation of ESD layouts, handling Antenna/EM etc·.

Ability to independently debug layout issues·.

Good team player·.

Good in SKILL programming or other scripting languages.

Job Type:Full-time.

Experience:.

total work:2 + years (Preferred).

Work Location:In person.