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Technologist, ASIC Development Engineering
3-7 years
Bangalore / Bengaluru
1 vacancy
Technologist, ASIC Development Engineering
SanDisk India Device Design Centre
posted 5mon ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- You are responsible for the further development of concepts and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes.
- Solid understanding of PDK s, effectively manage PDK libraries, collaterals and drive migration of design environments for incremental releases.
- Development of Calibre Physical Verification decks for cmos PLANAR and FINFET technologies including DRC, LVS, PERC, FILL LPE and shape generation decks and scripts.
- Layout Automation and Utilities development in Cadence SKILL/SKILL++.
- Development and validation of PV tools and flows like parasitic extraction, EMIR drop and substrate noise analysis.
- Responsibilities will include testing, validation, customer support and new tool/methods evaluations, development of methods and procedures for quality improvement, automation of deck/techFiles generation and validation.
- Experience with Cadence custom IC Virtuoso platform to create layout test structures, to validate verification rules and to troubleshoot errors.
- Experience with physical verification tools for DRC, LVS and parasitic extraction, Calibre, starRC, ICV etc is plus.
- Working knowledge of revision control software (Git, Perforce, Subversion, Synchronicity, etc)
- Collaboration with the IT team to fulfil advanced nodes specific requests (Linux, Exceed-on-Demand, Grid, VMWare-ESX, Storage-system, etc. ).
- Ensuring the operation and support within the CAD / IT-team for all ASIC designers worldwide.
- Managing the quality and ISO26262 requirements for the EDA tools, both for in-house developments and vendor products.
Employment Type: Full Time, Permanent
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