Video IP Verification Staff Engineer

Job Area:
Engineering Group, Engineering Group > Hardware Engineering

General Summary:

• Looking for candidates between 3 to 13 years of experience.
• Worked on coverage driven module verification.
• Strong in System Verilog, UVM
• Sound experience in testbench (stimulus, agent, monitor, checker) development.
• Failure debugging with Verdi & log file.
• Worked in the verification having c based reference model inside the testbench
• Experience with assertion development.
• Familiar with the EDA tools IUS, VCS, Verdi etc.
• Exposure in scripting(perl, Python).
• Good team player. Need to interact with the designers and other verification engineers proactively.
• Prior experience with video pipeline is added advantage.
• Knowledge of tensilica
• Worked with sub-system verification with tensilica
• Experience in C based system modelling.
• Debug with C based reference model.
• Have exposure to the other verification tasks : gate level simulation, Power aware simulation, formal verification, sub-system verification and emulation.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.