Infra Systems Architect, Engineer Staff

 
Company: Qualcomm India Private Limited
 
Job Area: Engineering Group, Engineering Group > Systems Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Systems Engineer, you will research, design, develop, simulate, and/or validate systems-level software, hardware, architecture, algorithms, and solutions that enables the development of cutting-edge technology. Qualcomm Systems Engineers collaborate across functional teams to meet and exceed system-level requirements and standards.
Minimum Qualifications:
"¢ Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

OR
Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.

OR
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.
Infra Systems Architect for the next generation System-on-chip (SoC) for smartphones, tablets and other product categories. This position will be responsible for

Technical and hands on role mainly for high level architecture and micro-architecture development.

Design the prototype or experiments for proof of concept for initial power, area or latency benefits

Candidate ready to learn new protocol and sub-systems to support different segments of infra solutions

Work with design team to resolve queries and ensure the completeness of design

Participate in development of the testplan and test scenarios for bug free RTL

Preferred Qualifications

8+ years of experience in IP architecture, micro-architecture and design.

Good understanding of SOC. Possesses expertise in any one of the following technical areas is a plus:DDR, Interconnects, SOC power management, clock/reset, UBWC, Encryption, ECC

Understanding of ARM architecture (Coherency, bus interconnects, Security, arch evolution)

Good communication and work with minimal supervision

Collaborate with Perf, Design and System team stakeholders in developing solutions

Experience with Verilog, logic design principles with timing, area and power implications.

Experience in testplan development, UVM, will be a great asset

Understanding of interconnect protocols like AHB/AXI/ACE/ACE-Lite/CHI.

Good Understanding of concurrency, bandwidth, latency and system level aspects

Education Requirements:Bachelor's degree in Electrical Engineering required, Master's or Doctorate preferred


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