CPU/Processor Verification – LSU Unit Lead

Responsibilities

Lead the unit level pre-silicon functional & performance verification the Load

Store Unit for our next -generation IBM POWER processor core systems offering.

Architect and enhance the existing verification environment for LSU, includingthe Load and Store pipelines, D-Cache, Address translation, out of orderexecution of the high performance processor CPU.

Develop verification test plan for both functional and performance verificationincluding the estimation for coverage closure.

Support higher level core/system simulation environment.

Participate in post silicon lab bring-up and validation of the Hardware.

Lead , guide ,mentor a team of engineers and represent them at global forums.

Thoroughly document verification environment details, providing comprehensiveinsights for future reference and continuous improvement.

Effectively Communicate progress ,potential challenges encountered andmilestones achieved to stake holders and team members. Required education Bachelor's Degree Required technical and professional expertise

8 years or more experience in functional verification of processors, demonstrating a deep understanding of load store unit verification.

Good understanding of computer architecture, including Processor core design specifications, with expertise in verifying Load Store unit of any CPU architecture.

Hands on experience of implementing D-Cache, Address Translation, Memory Consistency handling, Store ordering etc.

Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA

Experience with high frequency, instruction pipeline designs

At least 1 generation of Processor Core silicon bring up experience

In depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)

Exposure to system-level verification methodologies and techniques, ensuring holistic verification coverage across multiple levels of design

Proficiency in C++, Python scripting or similar object oriented programming languages.

Preferred technical and professional experience

Knowledge of instruction dispatch and Arithmetic units.

Knowledge of test generation tools and working with ISA reference model.

Experience with translating ISA specifications to testplan.

Knowledge of verification principles and coverage.

Understanding of Agile development processes.

Experience with DevOps design methodologies and tools.

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