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Associate II - VLSI-Physical Design-SV
Piktorlabs
posted 3mon ago
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Flexible timing
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Job Description
Physical Design Engineer
Experience: 4 - 7 Years
Desired Skills and Experience:
Experience: 4 - 7 Years
Desired Skills and Experience:
Engineers is expected to be very good in Basic Fundamentals of C-MOS technology
Expected to have a very good understanding of the PD Flow fand able to handle RTL/Netlist to GDSII independently at block level and should have done multiple tape outs (Low power implementation is preferred)
Should have hands-on experience of working on Lower technology nodes like 5nm, 7nm, 10nm, 14nm, 16nm, 28nm etc.
Hands-on experience in floor planning, placement optimizations, CTS and routing.
Hands-on experience in block/top level signoff STA, physical verification (DRC/LVS/ERC/antenna) checks and other reliability checks(IR/EM/Xtalk)
Hands-on experience in block/top level signoff STA, physical verification (DRC/LVS/ERC/antenna) checks and other reliability checks(IR/EM/Xtalk)
Should have expertise on industry standard EDA tools from Synopsys , Cadence and Mentor
( ICC2, Fusion-Compiler, Design Compiler, Primetime, PTSI, IC Validator, Innovus, Genus, Tempus, Encounter, Nanoroute, Calibre, StarRC and Redhawk, voltage storm
Exposure in DMSA flow for ECO generation and implementation.
Good knowledge of VLSI process and scripting in TCL, perl .
Employment Type: Full Time, Permanent
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Flexible timing
Monday to Friday
No travel
Day Shift
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