As an RTL Verification & Validation Engineer, you will ensure that the design meets the required functional and performance specifications and quality standards.
Key Responsibilities :
Design Verification: Design and implement verification strategies to ensure functional correctness and performance goals of digital designs against specifications. Develop test environment, reference models, test benches, test plan, test cases, test code, coverage metrics and verification closure criteria. Conduct simulations and/or emulation and debug to verify the functionality and performance of digital designs under various conditions. Ensure test objectives and coverage goals are met.
Methodology: Implement best practices in verification methodologies and techniques to ensure and improve verification quality and execution efficiency.
Collaboration: Work in coordination with other members of the development team and ensure team objectives are met.
Continuous Improvement: Contribute to process improvement initiatives to enhance verification and validation methodologies and ensure continuous RTL quality enhancement.
Requirements:
Bachelors or Masters degree in Electrical / Electronics Engineering, Computer Engineering, or related fields.
Expertise experience of 5+ years in verification and validation.
Proven experience in semiconductor verification and validation, preferably with complex digital designs like CPU/DSP core pipelines, cache coherence protocols or network on chip.
Strong proficiency in HDL (Verilog/SystemVerilog), object-oriented programming (OOP) concepts, and familiarity with verification methodologies like UVM (Universal Verification Methodology).
Experience with simulation tools such as ModelSim, VCS, or Questa.
Knowledge of scripting languages like Python, Perl, or Shell scripting for test automation.
Strong analytical and problem-solving skills with an eye for detail.
Excellent communication and collaboration skills to work effectively within a multidisciplinary team.
Ability to manage multiple tasks and meet project deadlines in a fast-paced semiconductor development environment.