Analog Layout Design Engineer

• Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.
• Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks.
• Performs the micro floor planning and detail signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance.
• Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality.
• Collaborates with analog circuit design, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed.
• Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications:

• B.Tech/M.Tech with 3 to 7 Yrs experience in AMS layout, DDR / HBN / High speed layout.
• Good understanding of design scripting skills for layout: Python, shell.
• Device knowledge good understanding in CMOS/ Finfet
• Worked on Cadence Virtuoso Synopsis tool (ICV)

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.