Standard Cell Circuit Design Engineer

Technology Enablement Group (TEG) is a part of Platform Enablement Solutions Group (PESG).

The charter of the group is to enable external foundry ecosystem to the product design teams across various domains.

• In this role, you would define, build, and evaluate standard cell circuit and/or standard cell layout to meet design requirements such as power, performance, area, and cost.
• Develops standard cell circuits for cell libraries and drives transistor level circuit design and performance analysis.
• Performs modeling of standard cell circuits, CMOS device characterization, and timing, power, and reliability characterization.
• Works with IP and SoC design teams to understand physical requirements and integrate ideas to meet performance, power, and area goals.
• Works with process technology teams to define and refine process requirements for standard cell design.
• Verifies standard cell circuits for functionality, performance, and power. Reviews and validates EDA model views of standard cells. Serves as the primary point of contact between design and standard cell library providers to ensure that design requirements are being met.

BE/B.Tech/ME/M.Tech/MS in Electrical or Electronics Engineering

Required skills:-

• We are looking for applicants with experience in Standard Cell circuit design of high-performance flip flops, latches, multibit flip flops, voltage level shifters, power management cells , Clock cells , retention flops and other complex circuits.
• Good understanding of CMOS device characteristics and design rules.
• Knowledge of deep submicron process issues and Finfet Technologies is a plus
• Good understanding of Digital circuits and optimization for better PPA.
• Good layout design knowledge and parasitic optimization in various types of layouts is a plus.
• Hands-on experience running SPICE simulations Scripting languages knowledge like Perl, Python, and Tcl is a plus.
• Great teammate with solid communication and analytical skills.