SoC Design Verification Engineer

 About The Role : 

Performs functional logic verification of an integrated SoC to ensure design will meet specifications.

Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.

Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment.

Finds and implements corrective measures to resolve failing tests. Collaborates and communicates with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.

Maintains and improves existing functional verification infrastructure and methodology.

Absorbs learning from postsilicon on the quality of validation done during presilicon development, updates test plan for missing coverages, and proliferates to future products.

 Qualifications 
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum (must haves)

Bachelor's degree in electrical engineering or computer engineering with 3 to 9 years of experience or a master's degree in electrical engineering or computer engineering.

3+ years of experience in 5 or more of the following:

Test Bench bring-up at SoC and strong programming skills in System Verilog, OVM and UVM.

Test Plan development experience.

Enabling regressions, maintaining QoV (quality of validation) with good functional/code/other coverage metrics.

Familiarity with both simulation and emulation environments.

Strong CPU/GPU architecture understanding.

RTL Debugging module level or soc level system simulation failures.

Building emulation models, enabling content

Working with Validation Engineers and central CAD teams to support and maintain verification requirements in terms of Automation and tool flow support.

Coordinating with Val team on CAD Requirement with support CAD, IT and Engineering Compute Teams.

Act as focal point between design and tool vendors for issues and feature enhancements.

Training/Supporting Validation Engineers in CAD tool flow and Infrastructure

Monitoring and improve existing simulation environments and simulation efficiency.

Experience with Power Management and memory domain will be a plus.

 Inside this Business Group The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.