443 Hospital Jobs in Bangalore / Bengaluru

About The Role :Develops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs. Participates in the definition of architecture and microarchitecture features of the block being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Supports SoC customers to ensure highquality integration and verification of the IP block. Drives quality assurance compliance for smooth IPSoC handoff.

QualificationsQualifications:BE , MTech in EC/EE. 4+ years' experience. Expertise in PCIe , Ethernet domain is a plusMinimum Qualifications:Bachelor's in Electronics Engineering with at least 4 yrs of experience in the following areas (master's degree may offset experience partially).Documentation related to bachelor's degree completion will be required.Frontend Development and related areas.Knowledge in RTL IP design , previous experience in RTL designExpertise in System Verilog, RTL coding.Digital Design Techniques.Possesses strong analytical and debug skills.Intermediate to advanced English level.Motivated for innovations in domain knowledge

Inside this Business GroupThe Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.