DFT Engineer (5-10 yrs)

About the company :

DeFT Semiconductors is a trusted company which satisfied major clients in the semiconductor market.

Established in 2017, headquartered in India, We are committed to attracting and developing a diverse workforce of DFT professionals that share the common value of collaboration.

We believe in teaming together with our clients to see beyond the surface of changes and problems organizations face in this fast-changing world to discover opportunities others might miss and face the future with greater confidence.

About the Job :

We're looking for DFT Engineer to join our team.

Does this sound like a good role for you?

- Ideal candidate for this role demonstrates excellent technical knowledge, strong communication skills, verbal and written, and awareness of project management issues.

- Keeps composure during crises and can comfortably handle risks and uncertainty.

- She/he has a strong desire to learn and explore new technologies.

- Demonstrates good analysis and problem-solving skills.

- Customarily exercises independent judgement in selecting methods and techniques to obtain solutions.

- Contributes to complex aspects of a project determines and develops approach to solutions.

- Provides regular updates to manager on the project status.

- Represents the organization on business unit and/or company-wide projects.

- Guides more junior peers with aspects of their job.

- Frequently networks with senior internal and external personal in own area of expertise.

Key Qualification :

- Typically, requires a minimum if 5+ years of related experience.

- Excellent understanding of DFT architectures & methodologies which includes Scan insertion, ATPG, JTAG, SIMS etc.

- Must have experience in generating scan patterns and coverage statistics for various fault models like stuck at, Transition faults and path delay.

- Experience in Scan Stuck-At and At-Speed coverage exploration, simulation and debug.

- Hands on experience in state-of-the-art EDA tools for DFT, design and verification.

- STA for DFT mode timing constraint development and exploration is a plus.

- Excellent debug skills and demonstrated experiences in Perl /TCL/Python scripting is a plus.

- Good Communications skills and the ability to effectively work with cross functional teams across geographies are required.

- Design experience in MBIST, LBIST and Analog DFT is an added advantage.