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Sr. Staff Semiconductor Design Engineer, High Speed IO
4-11 years
Bangalore / Bengaluru
1 vacancy
Sr. Staff Semiconductor Design Engineer, High Speed IO
Aptiv
posted 1mon ago
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Key skills for the job
Job Description
We are looking for a Sr staff semiconductor design engineer to work closely with multiple Aptiv engineering teams who are focused on the development of Aptiv s future generation of products.
This role is based in Aptiv s Bangalore, India office and will interface closely with Aptiv teams in California, USA and Germany. To facilitate collaboration with Aptiv s US/EU teams this role s regular working hours will include at least 7:30-10:30pm on workdays.
Your Role:
- Candidate should have a deep understanding of analog mixed-signal design with experience in high-speed transceivers. Demonstrated history of technical leadership.
- Expertise in designing the following high-speed IO and SERDES architecture of USB 2.0/3.0, PCIe Gen 5/6, LPDDR4/DDR4/DDR5/LPDDR5, MIPI CSI/DSI, Display Port, Ethernet, General Purpose IO Library. PHY Porting: MIPI, USB, HDMI, PCIe, DDR etc.
- Experience in clock generators : High-performance low-skew Low Power Crystal Oscillator, RC Oscillator, Low Jitter PLL and DLL Designs Clock Buffers and Dividers.
- In-depth knowledge of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques.
- Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization.
- Work closely with SoC Integration teams to drive high level achievements for IP development.
- Work closely with our design partners perform thorough design / verification / implementation reviews.
- Strong intuitive and analytical understanding of transistor- level circuit design including noise and mismatch analysis Experience with analog and digital behavioral modeling.
Familiar with Cadence schematic capture, virtuoso, Spectre and/ or HSPICE circuit simulation tools. - Must be familiar with layout parasitic extraction tools and layout dependent impairments in advanced CMOS processes.
- Work closely with our design partners and provide feedback, improvements to the IP. Collaborate with software/hardware teams to lead silicon validation of IPs.
- Support lab characterization of silicon.
- Lead weekly meetings with IP consumers to resolve technical issues.
- Support Post-Si teams for Product Performance, Power and functional issues debug/resolution
Your Background:
- Bachelor s degree in electrical engineering, computer engineering, or equivalent.
- 12+ years of experience in ARM CPU based full chip SoC development.
- Proven experience crafting Analog and Mixed-signal IPs and products
- Experience working in a dynamic engineering environment and real-time crisis management skills
- Committed to own/drive project development using well-defined metrics.
- Excellent written and verbal interpersonal skills.
- Advanced knowledge of IP development process, tools/flows and methodologies and life cycle in a SoC.
- Experience with Tx/Rx equalization techniques and circuits like de-emphasis, CTLE, DFE
- Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.)
- Experience in lab testing of high-speed transceivers
- Able to build VerilogA/AMS behavioral models
- Able to analyze and lead characterization data from lab and volume testing
Why join us
- You can grow at Aptiv. Whether you are working towards a promotion, stepping into leadership, considering a lateral career move, or simply expanding your network - you can do it here. Aptiv provides an inclusive work environment where all individuals can grow and develop, regardless of gender, ethnicity or beliefs.
- You can have an impact. Safety is a core Aptiv value; we want a safer world for us and our children, one with: Zero fatalities, Zero injuries, Zero accidents.
- You have support. Our team is our most valuable asset. We ensure you have the resources and support you need to take care of your family and your physical and mental health with a competitive health insurance package.
Your Benefits at Aptiv:
- Hybrid and flexible working hours;
- Higher Education Opportunities (UDACITY, UDEMY, COURSERA are available for your continuous growth and development);
- Life and accident insurance;
- Sodexo cards for food and beverages
- Well Being Program that includes regular workshops and networking events;
- EAP Employee Assistance;
- Access to fitness clubs (TC apply);
- Creche facility for working parents;
Employment Type: Full Time, Permanent
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What people at Aptiv are saying
Rating based on 30 Design Engineer
reviews
Anonymous · Engineering
in Chennai
Likes
Salary
Dislikes
- 9.30 working hr in chennai - Leave constraints - No. Of Leaves decides your productivity and appraisal - no transport facilities - no wfh
Read 30 reviewsDesign Engineer salary at Aptiv
reported by
174
employees
with 1-6
years exp.
₹2.5
L/yr - ₹9.5
L/yr
48%
more
than the average Design Engineer Salary in India
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What Aptiv employees are saying about work life
based on 782 employees
Flexible timing
Monday to Friday
No travel
Day Shift
Aptiv Benefits
Submitted by Company
Work for a team that believes in continuous learning Join a team that envisions a safer future Work on next-gen technologies Join an organization that cares We are an Inclusive and Diverse workplace
Submitted by Employees
Health Insurance 
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Job Training 
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Soft Skill Training 
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Sr. Staff Semiconductor Design Engineer, High Speed IO
4-11 Yrs
Bangalore / Bengaluru
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