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Advanced Micro Devices
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SMTS Silicon Design Engineer (Soc Physical verification Lead)
10-15 years
Bangalore / Bengaluru
1 vacancy
SMTS Silicon Design Engineer (Soc Physical verification Lead)
Advanced Micro Devices
posted 7d ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- Expertise in Full Chip Power Delivery Network Design, Implementation and Signoff
- Must have good understanding of RDL & Power grid design.
- Must know the NPV Static, Dynamic & SEM Run.
- Must have good experience of Vectored dynamic, CPM & Ramp up time analysis and current analysis .
- Must have experience on Full chip, Sub-system level & tile/block/partition level EMIR analysis and signoff
- Should have good knowledge of package level EMIR analysis.
- Expertise in low power design and implementation such as clock gating, power gating, power switch implementation and other low power techniques to reduce total power consumption.
- Should have good knowledge on simulation of special cell s with target power analysis.
- Should possess good knowledge of Power switch insertion, Secondary PG design towards improvising PPA.
- Mentor/coach/guide design engineers to achieve the project goal.
- Should have hands on experience on tools like Redhawk-SC, ICC2 & Prime Time or equivalent industry standard tools.
- Should have good scripting experience in Shell, Python, Perl, TCL, UNIX
- Understanding of ICC2 or Fusion Compiler Physical Design flows/methodologies or equivalent tools. Expertise on tool expected.
- Experience in TCL/Python and other languages needed. Should be strong in scripting and decode/debug old existing scripts.
- Experience with RHSC, PTPX, ICC2, Fusion Compiler
- Experience with mentoring a team on lower tech node (5/3nm) projects on PDN (EMIR)
- Experience in Full Chip/Sub-system level Physical Verification including DRC, LVS, DFM, ESD, High voltage checks etc,
- Bachelors or Masters degree in Computer/Electronics/Electrical Engineering
Employment Type: Full Time, Permanent
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