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RTL/Integration- Subsystem/IP Design Lead
11-15 years
Bangalore / Bengaluru
1 vacancy
RTL/Integration- Subsystem/IP Design Lead
Advanced Micro Devices
posted 4d ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- If you have an experience developing Subsystem by understanding architectural specification, this role is for you. You will be responsible for making Subsystem work by integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team.
- Design of Subsystems with integration of AMD and other 3rd party IPs
- Perform quality checks (lint, CDC, and power rule checks) of power-gated digital designs
- Work collaboratively with other members of the IP team to support design verification, implementation (synthesis, constraints, static timing analysis), and delivery to SOC
- Work in partnership with SOC teams to support the IP at SOC level, including connectivity, DFT, verification, physical design, firmware, and post-silicon bring-up
- Lead a subsystem development team of 4 to 5 members.
- 11+ years full-time experience in IP hardware design
- Proficiency in verilog/system verilog RTL logic design of high-speed, multi-clock digital designs
- Verilog lint tools (Spyglass) and verilog simulation tools (VCS)
- Clock domain crossing (CDC) tools
- Detailed understanding of SoC design flows
- Understanding of IP/SS/SoC Power Management(PM) techniques Power Gating, Clock Gating
- Experience with embedded processors and data fabric architectures (NoC)
- Outstanding interaction skills while communicating both written and verbally
- Ability to work with multi-level functional teams across various geographies
- Outstanding problem-solving and analytical skills
Employment Type: Full Time, Permanent
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