Design & Verification Engineer salary at Synopsys ranges between ₹10.6
Lakhs
to ₹13.5
Lakhs
per year for employees with experience between 2 years to 3 years. Salary
estimates are based on
2 latest salaries received
from various employees of Synopsys.
Top skills at Synopsys for Design & Verification Engineer
Python
TCL
Medical Coding
UVM
PCIE
Design Verification
Analog
Test Cases
SOC Verification
System Verilog
UVM
Coding
Perl
Automotive
Digital Design
Salary related reviews for Synopsys
Discover interview dos and don'ts from real experiences
Synopsys Design & Verification Engineer Salary FAQs
What is the notice period for Design & Verification Engineer at Synopsys in New Delhi?
Tell us how to improve this page.
- Home >
- Salaries >
- Synopsys Salaries >
- Synopsys Design & Verification Engineer Salaries >
- Synopsys Design & Verification Engineer Salaries in New Delhi