Upload Button Icon Add office photos
filter salariesFilter salaries by

Edic Semicon Design & Verification Engineer salaries in Hyderabad / Secunderabad

Annual salary range
1 - 2 years exp.
₹3 Lakhs - ₹5 Lakhs
Salary of majority employees
unlock blur
unlock blur

48% less than the average Design & Verification Engineer Salary for 1 - 2 years of experience

Interested in this particular role?

Salaries in different departments

Engineering - Hardware & Networks
Design & Verification Engineer Salary
1 - 2 years exp. (3 salaries)
unlock-blur

₹3.5 L/yr - ₹5 L/yr

Production, Manufacturing & Engineering
Design & Verification Engineer Salary
1 - 2 years exp. (AmbitionBox Estimate)
unlock-blur

₹3 L/yr - ₹3.5 L/yr

Last Updated: 1 Jan 2025

Companies similar to Edic Semicon for Design & Verification Engineer in Hyderabad / Secunderabad

Logo
Edic Semicon Design & Verification Engineer Salary

1 - 2 years exp. (6 salaries)

unlock blur

₹3 L/yr - ₹5 L/yr

vs
Company name Avg Annual Salary Open Jobs
Logo
Wipro Design & Verification Engineer Salary

1 - 5 years exp. (20 salaries)

unlock blur

₹3.5 L/yr - ₹9.7 L/yr

arrow icon 57% more
unlock blur

₹4.5 L/yr - ₹5 L/yr

arrow icon 25% more
1 job opening
Logo
TCS Design & Verification Engineer Salary

2 - 5 years exp. (6 salaries)

unlock blur

₹4 L/yr - ₹8.1 L/yr

arrow icon 50% more
unlock blur

₹4 L/yr - ₹8.2 L/yr

arrow icon 50% more
unlock blur

₹3 L/yr - ₹6 L/yr

arrow icon 12% more
Design & Verification Engineer salary at Edic Semicon ranges between ₹3 Lakhs to ₹5 Lakhs per year for employees with experience between 1 year to 2 years. Salary estimates are based on 6 latest salaries received from various employees of Edic Semicon.

Latest annual salaries shared by Edic Semicon Design & Verification Engineer in Hyderabad / Secunderabad

2w ago
avg blur mobile
2 years exp.
2w ago
avg blur mobile
1 year exp.
2w ago
avg blur mobile
1 year exp.
1mo ago
avg blur mobile
2 years exp.
1mo ago
avg blur mobile
1 year exp.
2mo ago
avg blur mobile
2 years exp.

Experience wise Edic Semicon Design & Verification Engineer salaries in Hyderabad / Secunderabad

Last Updated: 1 Jan 2025

Experience Avg Annual Salary
1 year  (3 salaries)

unlock blur

₹3.2 L/yr - ₹4 L/yr
2 years  (3 salaries)

unlock blur

₹3 L/yr - ₹5 L/yr

Similar Designation salaries in Edic Semicon

unlock blur
₹6 L/yr - ₹12 L/yr

Salary related reviews for Edic Semicon

Full Time

 · 

Other Department

1.0
  •  posted on 11 Oct 2023

1.0
 for  Salary and Benefits

Likes

Don't think of joining this company even if your without job it's same being here they promise many things before joining later they don't reply if we start asking anything no response salary will not be credited properly suddenly they stop giving and they don't reply for any query

read more

Dislikes

There way of treating employees and always lieng

see more salary related reviews

Edic Semicon Design & Verification Engineer Salary FAQs

What is the salary of Design & Verification Engineer at Edic Semicon Hyderabad / Secunderabad?
Design & Verification Engineer salary at Edic Semicon in Hyderabad / Secunderabad ranges between ₹3.0 Lakhs to ₹5.0 Lakhs for experience between 1 years to 2 years. According to our estimates it is 48% less than the average Design & Verification Engineer Salary in India. Salary estimates are based on 6 latest salaries received from various employees of Edic Semicon Hyderabad / Secunderabad.
How does the salary of a Design & Verification Engineer at Edic Semicon Hyderabad / Secunderabad compare with the average salary range for this job?
The average salary of a Design & Verification Engineer at Edic Semicon is 48% less than the average salary of a Design & Verification Engineer in Hyderabad / Secunderabad. To know exact salary insights, login to view.
Which similar companies are paying more than Edic Semicon to a Design & Verification Engineer in Hyderabad / Secunderabad?
  • Wipro Design & Verification Engineer Salary - ₹3.5 Lakhs to ₹9.7 Lakhs per year
  • Tech Mahindra Design & Verification Engineer Salary - ₹4.0 Lakhs to ₹8.2 Lakhs per year
  • TCS Design & Verification Engineer Salary - ₹4.0 Lakhs to ₹8.1 Lakhs per year
  • Capgemini Design & Verification Engineer Salary - ₹4.5 Lakhs to ₹5.0 Lakhs per year
  • Vertex Electronics Design & Verification Engineer Salary - ₹3.0 Lakhs to ₹6.0 Lakhs per year
What is the estimated take home salary of a Design & Verification Engineer at Edic Semicon in Hyderabad / Secunderabad?
The estimated take-home salary of a Design & Verification Engineer at Edic Semicon ranges between ₹26,987 per month to ₹28,396 per month in Hyderabad / Secunderabad. The take-home salary calculation is based on the average Edic Semicon Design & Verification Engineer salary in India which ranges between ₹3.0 Lakhs to ₹5.0 Lakhs per year for employees with experience between 1 years to 2 years. Check how did we calculate take home salary?
What is the notice period for Design & Verification Engineer at Edic Semicon in Hyderabad / Secunderabad?
According to AmbitionBox, 63% of the Edic Semicon Design & Verification Engineers in Hyderabad / Secunderabad reported a notice period of 15 days or less, 37% reported a notice period of 1 Month.This is based on 8 responses on AmbitionBox in last 2 years.

Tell us how to improve this page.

Edic Semicon Design & Verification Engineer salary in Hyderabad / Secunderabad ranges between ₹3 Lakhs to ₹5 Lakhs with an average annual salary of ₹unlock blur. Salary estimates are based on 6 Edic Semicon latest salaries received from various employees of Edic Semicon.