CD Equisearch FPGA and RTL Design Engineer Salaries by Employees

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₹22.5 Lakhs - ₹28.8 Lakhs

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Last Updated: 13 Aug 2022

Companies similar to CD Equisearch for FPGA and RTL Design Engineer

Company name	Avg Annual Salary	Open Jobs
Intel FPGA and RTL Design Engineer Salary 5 years exp. (22 salaries)	₹16.5 L/yr - ₹32 L/yr 7% less
Amdocs FPGA and RTL Design Engineer Salary 3 - 5 years exp. (9 salaries)	₹19.4 L/yr - ₹40.5 L/yr 25% more
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Data Patterns FPGA and RTL Design Engineer Salary 2 - 4 years exp. (7 salaries)	₹4 L/yr - ₹8.4 L/yr 77% less
Mistral Solutions FPGA and RTL Design Engineer Salary 1 - 2 years exp. (6 salaries)	₹6 L/yr - ₹8.5 L/yr 75% less
Ceat Tyres FPGA and RTL Design Engineer Salary 1 year exp. (5 salaries)	₹65 L/yr - ₹1.2 Cr/yr 281% more

FPGA and RTL Design Engineer salary at CD Equisearch ranges between ₹22.5 Lakhs to ₹28.8 Lakhs per year for employees with 2 years of experience. Salary estimates are based on 1 latest salaries received from various employees of CD Equisearch.

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Salary related reviews for CD Equisearch

RMS Executive in Mumbai

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• posted on 07 Aug 2023

1.0

for Salary and Benefits

Likes

Nothing at all

Dislikes

I left organization within a week, people expect you to learn the entire process in a day and half, rms mixed with unnecessary back office work as well, no proper training provided to you, no proper work space,can't take leave since only 2 to 3 ppl in 1 team, don't even provide pc or laptop so you can wfh ,use your own ,no proper hr Department, no canteen,don't even have proper wash room/toilet facilities, worst experience.

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• posted on 08 Nov 2024

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Likes

All other staff is good

Dislikes

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a manager - business analyst

Shifting from Bangalore to Hyderabad

I’m working in Bangalore for last 9 years. Currently I got 2 offers. 1. CTS - Bangalore (CTC - 22.7 LPA) 2. Deloitte - Hyderabad (CTC - 24.2 LPA) Is it good move to shift to Hyderabad for Deloitte ? Is it ok to ask the HR if my base location can be changed to Bangalore ? Please share your thoughts

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CD Equisearch FPGA and RTL Design Engineer Salary FAQs

How the salary growth look like for a FPGA and RTL Design Engineer at CD Equisearch in India?

The salary growth for a FPGA and RTL Design Engineer at CD Equisearch depends on factors such as experience, performance, and promotions. On average, a FPGA and RTL Design Engineer can expect the following growth trajectory at CD Equisearch:

Experience	Average Salary Range
2 years	₹22.5 Lakhs to ₹28.8 Lakhs per year

and so on.

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CD Equisearch FPGA and RTL Design Engineer Salaries

CD Equisearch FPGA and RTL Design Engineer salary in India ranges between ₹22.5 Lakhs to ₹28.8 Lakhs. This is an estimate based on latest salaries received from employees of CD Equisearch.

CD Equisearch FPGA and RTL Design Engineer salaries in India