Your Mission: Develop, configure, and customize the hardware design platform, utilizing it to generate vital training data for enterprise LLMs.
Liaise with research teams to translate requirements into actionable data insights, directly impacting our LLMs' performance.
Uphold the highest standards in coding, debugging, and documentation, ensuring the hardware design solutions are optimized for LLM training and benchmarking.
Collaborate across teams to identify and prioritize needs, contributing to the LLMs' ability to understand and automate complex processes.
We Need: BS or MS degree in Electrical, Engineering, or related field.
3-5 years of proven experience in hardware design development.
Expertise in HDLs such as Verilog, SystemVerilog, VHDL, and SystemC.
Expertise in scripting, front-end and verification workflows, and integrations within the hardware design environment.
Exceptional problem-solving, communication, and collaborative skills.
Familiarity with Synopsys/Cadence or open source toolchains.
Plus, if You Have: Expertise in UVM environments.
Expertise in Formal Verification.
Expertise in Lint process and refinement.
Experience with Computer Architecture and Assembly Coding and Debugging.