Senior Engineer- Analog Layout

Layout Design : Generate detailed physical layouts for analog and mixed-signal circuits based on schematic diagrams.Optimize layout for performance, power, and area (PPA) while adhering to design rules and constraints.Technology and Process Understanding : Have a deep understanding of semiconductor manufacturing processes and technologies.Stay updated on the latest advancements in semiconductor fabrication and layout techniques.Collaboration : Collaborate with the design, verification, and integration teams to ensure successful tape-outs and silicon bring-up.Work closely with other engineers to resolve any layout-related issues and improve overall design quality.Layout Verification : Perform layout versus schematic (LVS) and design rule checking (DRC) to ensure layout accuracy and compliance with design rules.Work with the verification team to resolve any discrepancies and implement necessary changes.IP Integration : Integrate intellectual property (IP) blocks into the overall chip layout.Ensure proper connectivity and functionality of IP blocks within the chip.Technology Node Migration : Participate in technology node migration activities, adapting layout methodologies to meet the challenges of advanced semiconductor manufacturing processes.Documentation : Create and maintain accurate documentation of layout methodologies, design decisions, and best practices.Provide documentation for tape-out and handoff to manufacturing teams.