Lead Physical Design Electrical Analysis Engineer - CPU

Job Area: Engineering Group, Engineering Group > Hardware Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

As a Physical Design Electrical Analysis Engineer, you will be driving the electrical analysis and closure at block as well as top level.

Roles and Responsibilities

Perform various electrical analyses at block and top levels, including static/dynamic IR, power/signal EM, and ESD

Drive block and top-level electrical verification closure

Develop power grid specs based on power/performance/area targets of different SOC blocks. Implement power grids in industry standard PnR tool environments.

Work closely with the PI team to optimize the overall PDN performance.

Work with CAD and tool vendors to develop and validate new flows and methodologies.

Preferred qualifications

BS/MS/PhD degree in Electrical Engineering;

6+ years of practical experience

In-depth knowledge of EMIR tools such as Redhawk and Voltus

Experience in developing and implementing power grid

Good knowledge of system-level PDN and power integrity

Practical experience with PnR implementation, verification, power analysis and STA

Proficient in scripting languages (TCL/Perl/Python)

Experience with industry standard EMIR tools such as Redhawk and Voltus

Basic knowledge of the physical design flow and industry standard PnR tools

Experience with scripting languages such as TCL, Perl and Python

Ability to communicate effectively with cross-functional teams

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