ASIC RTL Design Engineer(Camera) - Staff Engineer

Job Area: Engineering Group, Engineering Group > Hardware Engineering

General Summary:

Job Function :Camera Design Lead/Staff

Candidate will be responsible for design/developing next generation SoCs sub systems for mobile phone camera . Candidate will be working on ASIC based on the latest technology nodes. This role will require the candidate to understand and work on all aspects of VLSI development cycle like architecture, micro architecture, Synthesis/PD interaction and design convergence.

Skills/Experience

5-10 years with Masters (6 to 10 years with Bachelors)

Solid experience in digital front end design for ASICsSolid Expertise in RTL microarchitecture and design coding in Verilog/SV for complex designs with multiple clock and power domainsExpertise with various bus protocols like AHB, AXI and NOC designs

Experience in low power design methodology and clock domain crossing designsUnderstanding of full RTL to GDS flow to interact with DFT and PD teams

Experience in Tools like Spyglass Lint/CDC checks and waiver creationExperience in formal verification with Cadence LEC

Experience in mobile Multimedia/Camera design is a plus

DSP /ISP knowledge is a plus.

Working knowledge of timing closure is a plusExpertise in Perl, TCL language is a plusExpertise in post-Si debug is a plus

Good documentation skillsAbility to create unit level test plan

General

Should possess good communication skills to ensure effective interaction with Engineering Management and mentor group members.

Should be self-motivated and good team working attitude and need to function with little direct guidance or supervision

Responsibilities

Digital design and development (RTL) working in close collaboration with Multi-site leadsDeveloping the micro architecture and implementing the design using Verilog/SV. Integrate and deliver complex subsystem to SoCDesign and implement defined tasks independently.

Work in close coordination with Systems, Verification, SoC team , SW team, PD & DFT teams to get the goals completed.Analyze reports/waivers or run various tools :Spyglass, 0-in, DC-Compiler, Prime time, synthesis, simulation etc

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.

OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.


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