ASIC Backend Engineers/Lead

Your role involves working on complex projects and ensuring that ASICs meet performance, power, and area requirements.

Key Responsibilities:
Design Planning:Collaborate with cross-functional teams to define project goals, scope, and design requirements for ASIC projects.
Establish design plans, including specifications, milestones, and budgets.
Architecture and Microarchitecture:Create architectural and microarchitectural specifications for ASIC designs, outlining high-level structure and functionality.
RTL Design:Implement ASIC designs using hardware description languages (HDL) such as Verilog or VHDL.
Develop and optimize RTL (Register Transfer Level) code for logic design.
Synthesis and Optimization:Perform synthesis and optimization to ensure the ASIC design meets performance, power, and area targets.
Work on clock domain crossing, power management, and timing closure.
Verification Support:Collaborate with ASIC Verification Engineers to develop and implement testbenches and test scenarios to validate ASIC functionality.
Debug and resolve design issues identified during verification.
DFT (Design for Test):Implement DFT features, such as scan chains and boundary scan, to facilitate efficient testing of the ASIC.
Low-Power Design:Optimize ASIC designs for low-power operation, including clock gating, voltage scaling, and power gating.
Physical Design Support:Work with physical design and layout teams to ensure proper floor planning and placement of ASIC components.
Documentation:Maintain comprehensive and well-organized documentation of design specifications, RTL code, and design decisions.
Technology and Tool Awareness:Stay updated on semiconductor technologies, ASIC design tools, and industry best practices to enhance design processes.
Collaboration:Collaborate closely with cross-functional teams, including verification, software, and project management, to achieve project goals.