DFT Engineer - RTL/Shell Scripting - VLSI Domain (4-10 yrs)

Our leading clients provide end-to-end support for the semiconductor industry.

They are looking for DFT to be based at Bangalore with the following skills:

- Total 4 to 10 years of experience Scan Insertion, Test Kompression, ATPG, Memory BIST and JTAG at IC - level for mixed signal designs.

- Experience in using Mentor DFT tools, Cadence RC and simulator tools

- Define DFT Strategy and Requirement Specification for the design

- DFT verification for gate-level and timing simulations

- Work cross sites with design team to define and implement DFT.

- Hands on experience in solving DFT problems, simulation failures, ATPG coverage and DRC improvements.

- Work with STA engineer to define timing constraints for DfT modes

- Support Test engineer in silicon debug and pattern delivery for ATE

- Experience in RTL coding, shell scripting

- Experienced in handling analog DFT simulations

- Be fluent with all common concepts of DFT and DFT tools

- Notice Period: 30 days or serving 60 days or 90 Day notice period

- Education: BE/BTech, ME/MTech ( VLSI Domain )