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MaxLinear

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3.2

based on 30 Reviews

17 MaxLinear Jobs

Principal Physical Design Engineer

Maxlinear Technologies Pvt. Ltd.

3.2

based on 30 Reviews

6-11 years

Bangalore / Bengaluru

1 vacancy

Principal Physical Design Engineer

MaxLinear

posted 1mon ago

Job Role Insights

Flexible timing

Key skills for the job

Python Social Work AutoCAD Performance Testing Semiconductor DFT

+ 3 more

Job Description

Implementation (PnR & Signoff) of multimillion gate SoC designs in cutting edge process technologies (16nm, 5nm, 4nm or below)

All aspects of Physical Design including Floor Planning, Power Plan, Integrated Package and Floorplan design, Place and Route, Clock Planning and Clock Tree Synthesis, complex analog IP integration, Parasitic Extraction, Timing Closure, Power / IR Drop (Static and Dynamic), Signal Integrity Analysis, Physical Verification (DRC, ERC, LVS), DFM and DFY and Tapeout.

Proficient in Die size analysis, Partitioning, Pin placement

Must understand Analog and Third-Party IP integration

Innovate on the flows to meet the QoR targets and ensure predictability

Understanding of DFT STA modes for timing closure

Work closely with CAD on tech, flow and methodology

Exposure to the latest design rules, processes and innovations need to close PPA on the advance nodes.

Qualifications

Should have handled Netlist to GDS II atleast 1 Full Chip/Sub-system block level for multiple tape outs
Hands-on expertise with technology nodes like 16nm and below
Good knowledge of EDA tools from Synopsys, Cadence and Mentor, particularly with Innovus & Calibre
Hands-on experience in Chip/block floor-planning, placement optimizations, CTS and routing
Excellent understanding and hands on experience with physical verification (DRC/LVS/ERC/antenna) and other reliability checks (IR/EM/Xtalk)
Hands-on experience in block/top level signoff STA
Exposure in physical implementation of timing/functional ECOs
Being proficient in TCL, Python scripting is a plus
Tech. / M. Tech. with 14+ years of experience in Physical Design