Senior CAD Engineer

The Chip Package System Engineering (CPSE) is a global RD team under Engineering Enablement/CTO Office responsible for developing EDA tools, methodologies, and infrastructure to enable multi-IC systems in package (SiP), PCB, Heterogeneous Integration/chiplet based systems and uModules development across the company. As part of the CPSE organization, this position will focus on architecture, development and support of CPSE infrastructure which comprises of the following areas

Assembly Design Kits which contain packaging and assembly process technology information for EDA design, implementation, analysis and physical verification tools used for SIP and PCB products Component Libraries which comprise of released IC, SMD passives (R, L, C), packages, transformers, etc for SiP, PCB and Heterogeneous Integration (chiplet) product design and implementation. EDA tool modules, environment and distribution on Linux, Windows and hybrid CAD design environment Design data management of SIP/PCB and Module development projects in a hybrid CAD design environment (Linux and Windows)

As technical leader and mentor for a team 3-4 engineers involved in development and support of various aspects of the infrastructure, you will be expected to possess necessary programming skills and electrical engineering knowledge to architect, develop, QA, and CPSE infrastructure and the associated design flow for System product development.

Additional responsibilities:

Experience/ Qualification: