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DFT Design Engineer

5-10 years

Hyderabad / Secunderabad, Bangalore / Bengaluru

DFT Design Engineer

Intel

posted 2d ago

Job Role Insights

Flexible timing

Job Description


 About The Role : 
  • As a DFT engineer in the DFT and Manufacturing (DMT) organization, you will work to develop test automation solutions Design-for-Test (DFT) insertion and verification, test development, logic test content generation e.g. Automatic Test Pattern Generation (ATPG) and modular test content reuse.
  • You will architect, develop and deploy CAD capabilities to address problems in this space and adapt off-the-shelf capabilities where available to build solutions. You will collaborate with an interdisciplinary team spanning chip design, product development and process technology development.
  • The ideal candidate should exhibit the following behavioral traits:
  • Analytical skills for problem abstraction
  • Ability to apply scientific methods to investigate problems and to reduce ambiguity in making technical decisions.
  • You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.
  • Currently, the work model is hybrid

  •  Qualifications 
    Minimum Qualifications:The candidate must possess a BS, MS in Electronics/VLSI Design/Computer Engineering or Computer Science, with a thesis in the area of DFT, test CAD with 5+ years of experience.Candidate must have experience in following area:
  • Logic and memory design principles, VLSI design flow and VLSI CAD algorithms.
  • Tool, flows and methodology development for DFT insertion and test generation needs.
  • Strong understanding of VLSI design principles and digital logic design
  • Expertise in DFT methodologies including scan chain design, ATPG, BIST, and boundary scan
  • Proficiency with EDA tools like Synopsys, Mentor Graphics Tessent, Cadence.
  • DFT scan architecture and execution experience.
  • Programming skills with one or more of the high level languages e.g. C++/C/TCL/Perl/Python etc.
  • Ability to work independently and collaborate effectively with cross-functional teams
  • Theoretical knowledge in computer science, including algorithms and data structures.
  • Standard software engineering practices for version control, configuration management, debugging and validation.

  • Preferred Qualifications:
  • Detailed understanding of design-for-test (DFT) principles and knowledge of software design patterns and programming paradigms
  • Linux OS features and scripting languages

  •  Inside this Business Group Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.
     Other Locations IN, Hyderabad
     Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel'™s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

    Employment Type: Full Time, Permanent

    Read full job description

    Prepare for Dft Design Engineer roles with real interview advice

    Top Intel Dft Design Engineer Interview Questions

    Q1. What are the conditions for an RC circuit to work as an integrator/differentiator Can you derive it with this circuit
    Q2. What are second order effects in CMOS. Can you explain each one?
    Q3. How would you clear the 7th bit in a 32 bit register
    View all 156 questions

    What people at Intel are saying

    Dft Design Engineer salary at Intel

    reported by 8 employees with 2-4 years exp.
    ₹15.5 L/yr - ₹30 L/yr
    165% more than the average Dft Design Engineer Salary in India
    View more details

    What Intel employees are saying about work life

    based on 935 employees
    91%
    91%
    73%
    98%
    Flexible timing
    Monday to Friday
    No travel
    Day Shift
    View more insights

    Intel Benefits

    Submitted by Company
    Learning and career
    Flexible Work Options
    On-Site Conveniences
    Lifestyle
    Giving Back
    Health Benefits +3 more
    Submitted by Employees
    Work From Home
    Free Transport
    Gymnasium
    Cafeteria
    Health Insurance
    Team Outings +6 more
    View more benefits

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    Intel Bangalore / Bengaluru Office Locations

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    Bengaluru Office
    136, HAL Old Airport Rd, Kodihalli, Bengaluru, Karnataka 560017, India Bengaluru
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    Bengaluru Office
    Outer Ring Rd, Adarsh Palm Retreat, Bellandur, Bengaluru, Karnataka 560103, India Bengaluru
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