Spice Modeling Engineer

• Develops, maintains, and ensures quality assurance of process design kit (PDK) collateral, including PDK runset, PDK extraction, and modeling transistors for Intel design teams to enable new processes and methodologies to be followed across Intel's product lines.
• Develops automation of QA flow methodologies for specific technology nodes to scale up QA coverage. Documents and monitors QA results.
• May include developing test patterns to quality the physical design rules for correct implementations. Performs validation for PDK library covering collaterals, partition cells, 3DIC packaging, and back end physical design checks.
• Ensures that the design teams meet the requirements of the process node. Leads root cause analysis for issues related to designing to a specific process technology and continuously drives initiatives to enhance design methodologies.
• Creates and maintains technology files with symbols, device parameters, Pcells, design verification decks, layouts, process constraints, design rule checks, and/or layout versus schematic runsets for silicon designers to understand the design process. Resolves issues and bugs found within the PDK collateral.
• Builds test structures and runs simulation, physical verification, and parasitic extraction to ensure proper model and design solutions.
• May also deliver design flows, guidelines, and tutorials through sample design databases, test chips, and libraries. Collaborates with silicon design, process engineering, and high volume manufacturing teams to identify new process technologies and ensure new solutions are high quality and ensure ease of use for both internal and external design communities.
• Works with EDA vendors on tool improvements to enhance performance and add functionality.

This position involves developing and maintaining compact device models in internal and external circuit tools while working in a highly interactive team environment.

Responsibilities include:

1. Developing process file extraction quality and performance evaluation tools.

2. Devising methodologies to extract compact model parameters from IV and CV data for developing semiconductor processes.

3. Working closely with technology development and design engineers who use or develop circuit tools, compact models and process files.

Minimum QualificationsMaster's with 8+ years or PhD with 3+ years in Electrical Engineering, Microelectronics or related fields with an emphasis in semiconductor device physics.

Additional Desired Qualifications

1. Graduate level courses or projects relevant to device simulation, circuit simulation and/or compact model development.

2. Expertise in python scripting.

3. Ability to be cognitively flexible and agile in a fast-changing software environment.

4. Good interpersonal written and verbal communication skills and ability to work well in a team environment.