Senior IP/SOC Verification Engineer : Bangalore

• Strong Debug, UVM, System Verilog
  
• Understanding Specs and Standards and developing relevant test plans
  
• Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved
  
• Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening
  
• Post-si bring-up and HW-SW debug experience would be a plus. Knowledge & exposure to silicon debug tool chains would be an added advantage Preferred Qualifications 5+ Year of industry experiences in the following areas: -
  
• Thorough understanding of Digital design concepts
  
• Thorough understanding dv methodologies and tools
  
• Good understanding of DDR families (LP/PC) and generations (DDR2/3/4/5)
  
• Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite
  
• Understanding of multi-core ARMv8 CPU architecture, coherency protocols and virtualization
  

Interested can share resume on Shubhanshi@incise.in