Senior Staff Power Design Engineer

This position is with Power signoff team part of The Custom Compute and Storage (CCS) group at Marvell, Bangalore. This team is part of global Implementation team that plays a key role in Netlist to GDS implementation, covering Synthesis, P&R, Timing, PV and Power implementation all custom ASICs for all the OEM s. We are looking for a strong technical individual contributor having experience in low power design using industry standard tools.

• Work on digital design for ASICs, Physical Implementation, Power Supply integrity checks Low Power design & Signoff
• Work on complete SoC design cycle of ASICs, starting from Architecture definition, feasibility planning/benchmarking for Power/Performance/Area/Yield to end-to-end design/Implementation/Signoff
• Work on challenging design architecture across Networking, Processor, Computing, automotive, Connectivity and Security, in the technology nodes across 3nm/5nm/7nm and more.
• Collaborate with cross-functional teams including RTL design, verification, and DFT to optimize power.
• Perform floorplanning, placement, clock tree synthesis, routing, and physical verification.

• Bachelor s or Masters degree in Computer Science, Electrical Engineering or related fields and 10+ years of related professional experience.
• Exposure on ASIC Physical implementation, Layout and Semiconductor device/process through previous work/intern experience or course work.
• Experience in power analysis, estimation, and optimization flow.
• Understanding of Physical Design and EM/IR flow
• Expertise in Tcl and PERL.
• Experience in Physical design is preferable.
• Scripting/programming using Tcl/Tk/Perl/Python/Shell
• Detail oriented, self-motivated team worker, good verbal, and written communication skills.
• Strong Digital Design concepts and debugging skills.

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