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1 MaxLinear Asic Design Engineer Job
Senior Staff ASIC Design Engineer
MaxLinear
posted 3mon ago
Job Role Insights
Flexible timing
Key skills for the job
Job Description
- Work on creating best-in-class SoCs incorporating multicore CPU subsystems, high speed peripherals, domain specific accelerators, signal processing engines and high-speed interconnect
- Perform RTL design and execute RTL checks, including Lint, CDC, and RDC
- Develop and execute verification plans for subsystems and SoCs
- Work closely with cross-functional teams on architecture evaluations, performance and power analysis, and both pre- and post-silicon validation
- Support verification tasks and provide debugging assistance
- Conduct specification reviews, code reviews, integration reviews, and coverage analysis to ensure quality standards are met
- Develop timing constraints
- Contribute to improving methodologies for increasing efficiency of the SoC design process.
- Mentor and guide junior team members
- Expertise in digital design with a deep understanding of SoC architectures
- Extensive experience with ARM AMBA bus protocols
- Proven track record in complex SoC design and verification projects
- Proficiency in RTL coding using Verilog/SystemVerilog
- Good understanding of the C programming language
- Experience with scripting languages such as Perl or Python
- Strong debugging skills in both functional and gate-level simulations
- Familiarity with standard version control systems
- Excellent written and verbal communication skills
- Experience working with global, cross-functional teams
- BE or ME in Electrical/Electronic Engineering with 10+ years of experience
Employment Type: Full Time, Permanent
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(based on 10 MaxLinear interviews)
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Referral
50%
30%
20%
Moderate
Confidence
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What Asic Design Engineer at MaxLinear are saying
Rating based on 1 Asic Design Engineer
review
Anonymous · ASIC
in Bangalore
Likes
They are behind emoyees blood and forcing them to come to office even in pandemic where companies are relaxing this
Read 1 reviewAsic Design Engineer salary at MaxLinear
reported by
1
employee
₹10.8
L/yr - ₹13.8
L/yr
7%
less
than the average Asic Design Engineer Salary in India
View more details
What MaxLinear employees are saying about work life
based on 30 employees
Flexible timing
Monday to Friday
No travel
Day Shift
MaxLinear Benefits
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