Trainee Firmware Engineer / Firmware Engineer

1) Bachelors of Engineering in ECE/EEE only (Full Time).
2) Year of passing: 2022,2023,2024.
3) Minimum Aggregate: 60% throughout (10, +2 & BE) (We do not encourage any current backlogs).
4) AMCAT (or similar) assessment, would be an added advantage.

Primary Skills:
1) Design / development / verification & validation of RTL or IP cores for FPGA based embedded systems.
2) Experience on FPGA based embedded system based on Xilinx/Altera/Actel etc.
3) RTL Design, experience in VHDL, Verilog HDL coding.
4) Ability of Logic synthesis and verification is an added advantage.
Secondary Skills:
1) Vivado/Libero design suite, Mentor Graphics/Aldec V&V tools.
2) Ability to write test benches for FPGA based design validation