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Premium Employer

Advanced Micro Devices

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3.8

based on 254 Reviews

Video summary

208 Advanced Micro Devices Jobs

Sr. Silicon Design Engineer

Advanced Micro Devices, Inc

3.8

based on 254 Reviews

5-10 years

Hyderabad / Secunderabad

1 vacancy

Sr. Silicon Design Engineer

Advanced Micro Devices

posted 1d ago

Job Role Insights

Flexible timing

Key skills for the job

Python Social Work Recruitment Packaging Perl Silicon Validation

+ 4 more

Job Description

As the SoC Physical Verification Lead, you will be responsible for the end-to-end physical verification of complex System-on-Chip (SoC) designs, ensuring compliance with industry standards and design rules. You will oversee verification flows and work closely with the layout, design, and DFM (Design for Manufacturing) teams to guarantee that all design constraints are met before tape-out. This role requires expertise in verification tools, deep knowledge of design rule checking (DRC), layout versus schematic (LVS) checks, and a strong commitment to quality and reliability in advanced technology nodes.

Technical Requirements

Proficiency with physical verification tools such as Mentor Calibre, Synopsys IC Validator, or Cadence Pegasus.
Strong knowledge of DRC, LVS, ERC, and antenna rules, as well as other physical verification checks.
Experience in debugging complex DRC and LVS violations and collaborating on design fixes.
Familiarity with scripting languages such as Tcl, Perl, or Python to automate verification tasks and improve workflow efficiency.
Understanding of design for manufacturing (DFM) requirements and techniques
Excellent problem-solving abilities, attention to detail, and a collaborative attitude

Responsibilities

Lead the SoC physical verification including DRC, LVS, antenna checks, and electrical rule checking (ERC), ensuring all layout requirements meet foundry specifications and project timelines.
Develop, enhance, and maintain verification flows using tools such as Mentor Graphics Calibre, Synopsys IC Validator. Streamline and automate flows to improve efficiency and accuracy
Work closely with the design and block level teams to resolve DRC and LVS violations. Proactively identify potential design issues, provide guidance on best practices, and ensure full compliance with foundry design rules.
Interface with cross-functional teams, including IP, physical design, and packaging, to ensure that physical verification issues are resolved in alignment with project specifications.
Mentor junior engineers in physical verification, best practices, and troubleshooting techniques. Provide training on physical verification tools and methodologies as needed.