AMS Verification Engineer - System Verilog (4-21 yrs)

We are seeking a highly skilled and experienced AMS Verification Engineer to join our team. In this role, you will play a critical part in the verification of complex Analog Mixed Signal (AMS) designs.

You will be responsible for developing and executing comprehensive verification plans, writing testbenches, and ensuring the functional correctness of our cutting-edge products.

Key Responsibilities :

- Develop and execute comprehensive verification plans for complex AMS designs, including analog, digital, and mixed-signal blocks.

- Deep expertise in Verilog AMS, Verilog-A, and WREAL for modeling analog behavior.

- Proficiency in using industry-standard AMS simulation tools (i.e. Cadence Virtuoso, Synopsys CustomSim).

- Develop and debug complex testbenches using SystemVerilog and UVM methodologies.

- Create and maintain AMS verification environments from scratch.

- Conduct thorough gate-level netlist simulations to ensure functional correctness and timing closure.

- Analyze simulation results and debug issues effectively.

- Guide and mentor junior engineers on AMS verification methodologies and best practices.

- Train team members on new tools and techniques.

- Share knowledge and expertise within the team to foster a collaborative and learning environment.

- Utilize scripting languages such as Python, Perl, and Shell scripting to automate verification tasks and improve efficiency.

- Clearly document verification plans, testbenches, and results.

- Effectively communicate technical information to both technical and non-technical audiences.

- 5+ years of hands-on experience in AMS verification.

- Strong expertise in Verilog AMS, Verilog-A, and WREAL for analog modeling.

- Proficiency in using industry-standard AMS simulation tools (i.e., Cadence Virtuoso, Synopsys CustomSim).

- Experience with SystemVerilog and UVM methodologies for testbench development.

- Experience with gate-level netlist simulation.

- Excellent problem-solving, analytical, and debugging skills.

- Strong communication and documentation skills.

Preferred :

- Experience with scripting languages like Python, Perl, and Shell.

- Experience with mixed-signal design flows.

- Experience with formal verification techniques.

- Master's degree in Electrical Engineering or a related field