Quest Global PD/STA Weekend Drive 8 Mar 25

PD Weekend Drive at Ahmedabad / Bangalore/Hyderabad

• 4-10 years experience with Bachelors degree in Electronics Engineering or equivalent
• Knowledgeable in all aspects of deep submicron ASIC design flow.
• Knowledgeable in Static Timing Analysis, Power Analysis and Physical Verification.
• Hands-on experience in developing and modifying PD-flow/EDA-tools scripts/recipes using TCL/SHELL/PYTHON programming languages.
• Experience in developing PD metrics dashboard scripts for QOR tracking is a plus
• Experience in modifying STA constraints to check timing closure feasibility
• Experience in various clock implementation strategies (Multi-point CTS, Flex-H, Custom-CTS) for meeting block level and full chip level latency and skew targets
• Experience in FinFET & Dual Patterning nodes such as 16/14/10/7/5/3nm

Please forward your updated profile to below details to chakradhar.marupuru@quest-global.com.