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Its was basice itest
PPT was given to make of the products of the company
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posted on 13 Aug 2024
3 rounds online, dsa, hr
posted on 22 Aug 2024
I applied via Campus Placement and was interviewed in Feb 2024. There were 3 interview rounds.
It was online coding test consist of 2 question
One from DP and other graph
One question of DP within in 45 min time constraints
Floor value of square root of a number is the largest integer less than or equal to the square root.
The floor value of square root of a number can be found using mathematical functions like floor() or integer division.
For example, the floor value of square root of 16 is 4, as sqrt(16) = 4.
For non-perfect square numbers, the floor value of square root can be calculated using approximation methods.
posted on 6 Oct 2023
I applied via Campus Placement and was interviewed in Apr 2023. There were 3 interview rounds.
Level was medium to hard
To print a tree in anticlockwise direction, start from the bottom left and traverse each level from right to left.
Start from the bottom left of the tree
Traverse each level from right to left
Print the nodes as you traverse
Some old coding platform with limited testcases
posted on 20 Nov 2024
I applied via Naukri.com and was interviewed in May 2024. There were 2 interview rounds.
Coding round where they ask few coding questions
2 coding questions, aptitude and electronics
I applied via Campus Placement and was interviewed in Feb 2024. There were 2 interview rounds.
Digital electronics, circuits , verilog , asic design flow
ASIC design flow process involves steps like specification, design, verification, synthesis, and testing.
Specification: Define requirements and constraints for the ASIC design.
Design: Create a high-level design based on the specifications.
Verification: Verify the design using simulations and tests.
Synthesis: Convert the design into a netlist of gates and connections.
Testing: Test the fabricated ASIC to ensure functiona...
Power reduction techniques in CMOS involve various methods to minimize power consumption in CMOS circuits.
Use of power gating to selectively turn off power to unused circuit blocks
Implementing clock gating to disable clock signals to unused circuitry
Utilizing voltage scaling to reduce power consumption at lower voltages
Applying dynamic voltage and frequency scaling to adjust voltage and frequency based on workload
Using...
posted on 10 Aug 2022
I applied via Referral and was interviewed before Aug 2021. There were 2 interview rounds.
I am always striving to improve, but my current weaknesses are: perfectionism, public speaking, and delegating tasks.
Perfectionism can lead to spending too much time on small details and missing deadlines.
Public speaking can make me nervous and I may need to practice more to feel confident.
Delegating tasks can be difficult for me because I like to have control over the outcome, but I am working on trusting others to ha
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